CF24-OSHW
CF24-OSHW
Workshop on Open-Source Hardware
Co-located with 21th ACM International Conference on Computing Frontiers (CF’ 24) May 7 - May 9, 2024 - Ischia (NA), Italy
We are excited to announce a new workshop on the topic of open-source hardware, to be held concurrently with Computing Frontiers 2024.
Aim and Scope
The workshop aims to bring together researchers and practitioners working in the fields of computer architecture, electrical engineering, and computer science to discuss and share their latest research and developments in open-source hardware and related open-source software. We welcome submissions on a wide range of topics, including but not limited to:
- Design/implementation based on open-source processors, memory systems, and I/O devices
- CAD tools and methodologies for hardware design based on open-source
- Embedded systems and IoT devices based on open-source
- PCB, FPGA, and ASIC design and fabrication based on open-source
- Firmware and software for embedded systems based on open-source
- Compilers and frameworks based on open-source
- Test and Verification frameworks for hardware based on open-source
- Power and Energy-Efficient systems based on open-source
- Hardware security and trust in open-source systems
Submissions should be in the form of an extended abstract (minimum 2, maximum 4 pages), formatted according to the double-column ACM conference format, accompanied by a link to a public repository (GitHub, etc.). Accepted abstracts will be included in the workshop proceedings and published in the ACM Digital Library. At least one author of an accepted abstract is required to register for the whole Computing Frontiers 2024 conference.
Submission page and information
Submit at https://easychair.org/my/conference?conf=cf24oshw.
Proceedings from the workshop will be published by ACM along with regular Computing Frontiers papers.
Important dates
- Abstract submission deadline: March 3, 2024
- Notification of acceptance: March 10, 2024
- Camera ready deadline: March 17, 2024
Workshop co-chairs:
The co-chairs:
- Davide Schiavone, OpenHW Group, Switzerland
- Angelo Garofalo, ETH Zurich, Switzerland
- Francesco Conti, University of Bologna, Italy
- Alessio Burello, Polytechnic of Turin, Italy
For more information or any questions, please contact us.
We look forward to receiving your submissions and seeing you at the workshop!
Tentative Program
| PAPER ID | TITLE OF THE TALK | TIME (min) | PRES. | Q&A |
|---|---|---|---|---|
| INVITED | 25 | 20 | 5 | |
| 1 | Using a Performance Model to Implement a Superscalar CVA6 | 18 | 15 | 3 |
| 11 | Seeing Beyond the Order: a LEN5 to Sharpen Edge Microprocessors with Dynamic Scheduling | 18 | 15 | 3 |
| 3 | Integrating SystemC-AMS Power Modeling with a RISC-V ISS for Virtual Prototyping of Battery-operated Embedded Devices | 18 | 15 | 3 |
| 5 | Stitching FPGA Fabrics with FABulous and OpenLane 2 | 18 | 15 | 3 |
| BREAK | 15 | |||
| 10 | NARS: Neuromorphic Acceleration through Register-Streaming Extensions on RISC-V Cores | 18 | 15 | 3 |
| 9 | muRISCV-NN: Challenging Zve32x Autovectorization with TinyML Inference Library for RISC-V Vector Extension | 18 | 15 | 3 |
| 6 | Performance evaluation of acceleration of convolutional layers on OpenEdgeCGRA | 18 | 15 | 3 |
| 7 | Open-Source Elastic CGRA Generator | 18 | 15 | 3 |
| BREAK | 15 | |||
| 12 | A Gigabit, DMA-enhanced Open-Source Ethernet Controller for Mixed-Criticality Systems | 18 | 15 | 3 |
| 2 | Implementation and integration of NTT/INTT accelerator on RISC-V for CRYSTALS-Kyber | 18 | 15 | 3 |
| 8 | Model theft attack against a tinyML application running on an Ultra-Low-Power Open-Source SoC | 18 | 15 | 3 |